1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming fine patterns, such as wiring materials, used for the semiconductor device with high accuracy.
2. Description of the Prior Art
In processing wiring materials of LSI, for example aluminium alloys, a dry etching method using the gas of CI family is generally used. Moreover, to process a fine pattern of the wiring materials on a wafer with high accuracy, the so-called anisotropic etching method is generally used. The anisotropic etching method can be executed by using the effect that a decomposed resist residue attach to the side walls of wiring materials to protect it from the etching treatment. Accordingly, to carry out the anisotropic etching, it is necessary to provide a resist pattern having an area more than a required one on the wafer.
FIG. 1 is a schematic diagram to show a conventional arrangement of exposure pattern on a wafer. In the same drawing, numeral 1 designates a silicon wafer, and 2 denotes an one section or a chip in the exposure patterns. In the prior art, the exposure is repeatedly carried out with respect to each section 2 in the exposure patterns. When the exposure is completed over all the surface of the wafer 1, a development process is carried out, then an etching process is performed.
FIG. 2 is a diagram to show the relation between a resist density in a chip and an amount of undercut of a wiring material in a semiconductor device formed by the exposure pattern using a conventional arrangement method. In the same drawing, the horizontal axis designates the resist density (%) in the chip, and the vertical axis shows the amount of undercut ((a-b) .mu.m).
From the same drawing, it is seen that when the resist density is smaller than about 20%, the undercut amount is rapidly increased.
In a memory represented by a DRAM, same pattern are frequently repeated in the structure of it. In this case, the resist area occupies more than 40% in the area of the wafer. it therefore becomes possible to manufacture such memories by using the anisotropic etching method.
On the other hand, ASIC (Application Specific Integrated Circuits) foemed for specific uses have recently increased in use and manufacturing. The semiconductor device of this type has often an irregular structural pattern. The area therefore occupied by the resist on a wafer is reduced, and occasionally it becomes less than 10% to that of the wafer. In this case, the etching rate is reduced by the loading effect on manufacturing. Moreover, since the decomposed resist is generated not so sufficiently as to form the protective layers, etching residues and undercut are likely to be generated. It therefore is very difficult to form the fine patterns with high accuracy in manufacturing, moreover the productivity tends to be decreased.